Attended Conferences

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[JP'12]   XXIII Jornadas de Paralelismo, Elche (Spain). 19-21 September 2012.
     

[FECIES'12]		   IX Foro sobre la Evaluación de la Calidad de la Investigación y de la Educación Superior (FECIES'12), 12 - 15 June 2012, Santiago de Compostela, Spain. Attendance and presentation of the contribution Sistema de Evaluación Automática para Prácticas de Estructura de Computadores.
     

[FECIES'11]		   VIII Foro sobre la Evaluación de la Calidad de la Investigación y de la Educación Superior (FECIES'11), May 31 - June 3, 2011, Santander, Spain. Attendance and presentation of the contribution Sobre los mecanismos de evaluación de la calidad docente en el EEES.
     

[MICRO'10]		   The 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-43), December 4-8, 2010, Atlanta, Georgia, USA. Attendance and presentation of the paper Architectural support for Fair Reader-Writer Locking.
     

[EDUCON'10]		   IEEE Engineering Education 2010 (EDUCON'10), April 1416, 2010, Madrid, Spain. Attendance and presentation of the paper Design of an Introductory Networking subject in advance of the European Higher Education Area: Challenges, experiences and open issues.
     

[EPHAM'08]		   1st Workshop on Exploiting Parallelism with Transactional Memory and other Hardware Assisted Methods (EPHAM), April 6, 2008, Boston, Massachusetts, USA. Attendance and presentation of the paper Towards Fair Scalable Locking.
     

[TRANSACT'08]		   3rd ACM SIGPLAN Workshop on Transactional Computing, February 23, 2008, Salt Lake City, Utah, USA. Attendance and presentation of the paper Hybrid Transactional Memory to accelerate safe lock-based transactions.
     

[PPoPP'08]		   13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, February 20-23, 2008, Salt Lake City, Utah.
     

[ACACES'06]		   Second International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems, L’Aquila, Italy, 23-29th July 2006. Attendance and presentation of the poster: Chip Multiprocessors with Implicit Transactions [abstract]
     

[MICROGRID]		   1st Microgrid Workshop, held at the Science Park in the University of Amsterdam, The Netherlands, 1st and 2nd of July 2005. Attendance and presentation of the contribution Dense Gaussian Networks
     

[ACACES'05]		   First International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems, L’Aquila, Italy, 24-30th July 2005. Attendance and presentation of the posters: New Layouts for Midimew Interconnection Networks [abstract] and Hierarchical Gaussian Topologies [abstract]
     

[EUROM05]		   13th Euromicro Conference on Parallel, Distributed and Network-based Processing. pp. 118 – 125. Lugano, Switzerland, February 2005. Attendance and presentation of the paper Practicable Layouts for Optimal Circulant Graphs.
     

[JOR05] 		  XVI Spanish Parallelism Conference, Granada, Spain, Sept. 05. Attendance and presentation of the papers KIMP: Multicheckpointing Multiprocessors and Gaussian Interconnection Networks.